The present invention relates generally to the field of branch pattern (or “sequences”) for workloads, and more particularly to execution of branch sequences on microarchitecture.
Understanding the core performance of a competitor's processor: (i) is potentially quite useful in the current market when designing the next generation of microprocessors; and (ii) can give companies that design processors and/or software a competitive advantage. It is very difficult to evaluate the branch performance across multiple generations of microarchitecture. It can also be helpful for a company to understand the improvements made by a competitor when the performance of various benchmarks and industry applications out-perform their own systems.
A Conventional computer program has a control flow. The control flow is a path taken by the processor through the program code. This path is designated by the program's algorithm, plus input data. When the program gets converted to machine language (assembly language), it is the branch instructions that enable this control flow. Modern microprocessors achieve much of their impressive performance by determining, prior to actual execution, the following: (i) the control flow direction (that is, determination of whether a given jump should be made); and (ii) path (that is, to exactly which destination should a given jump be made). This is one technique by which some conventional microprocessors work their way ahead without waiting for branches to get resolved (that is, to have known branch resolutions). However, the making of these control flow and path predictions is not always straightforward. Indirect branches can allow program flow to jump to instruction addresses that are determined at runtime. This branch prediction (for a particular branch based on that branch's instruction address) is conventionally based on: (i) previous behavior; and (ii) the path taken to reach this branch. Simply put, conventional branch prediction works largely on the basis of history, which is to say, previous behavior.
Processor speculation design and branch prediction is a focus of various chip makers in recent times. Close to perfect branch prediction helps improve the performance and to exploit the underlying instruction level parallelism. Branch prediction also helps avoid flushes in the pipeline which can cause a lot of wasted work. Improvements made in the area of branch prediction and speculation design by electronic chip manufacturers has resulted in great performance improvements.
In the field of computer engineering, microarchitecture is the way that an ISA (instruction set architecture) is implemented on a processor. Typically, any given ISA may be implemented with different microarchitectures, where implementations may vary due to the goals of a given design or due to ongoing changes in technology. Decisions on microarchitecture design directly affect what elements are used in a system. The design considerations include but are not limited to component cost, component size, power requirements, complexity of the logic, connectivity, manufacturability, testability and simplification of debugging.